1. Field of the Invention
The present invention relates to a display panel, especially to a circuit structure of a display panel and a method for repairing disconnection of the circuit of a display panel.
2. Description of the Related Art
FIGS. 1 and 2 show a top view and a local enlarged view of a conventional display panel, respectively. The conventional display panel 10 comprises a plurality of address lines and a plurality of pixel electrodes 13. The address lines are a plurality of data lines 11 in the vertical direction and a plurality of scan lines 16 in the horizontal direction. The data lines 11 and the scan lines 16 are perpendicular to each other and are oriented transverse to each other.
Referring to FIG. 2, a local enlarged view of the conventional display panel of FIG. 1 is shown. The display panel 10 comprises at least one circuit structure 12 that comprises at least one data line 11, a scan line 16, a pixel electrode 13, a thin film transistor 15 and a storage capacitor 18.
The pixel electrode 13 and the data line 11 have a dummy data line 14 therebetween. The dummy data line 14 is a floating circuit and comprises an opaque layer for shading light in order to avoid the leakage caused by the disclination of the liquid crystal in the margin of the pixel electrode 13 and to increase the tolerance during the alignment between the upper and lower substrates so as to increase the open ratio. The material of the dummy data line 14 is metal. The thin film transistor 15 is electrically connected to the pixel electrode 13 so as to control the pixel electrode 13.
Referring to FIGS. 2 and 3, the thin film transistor 15 comprises a gate electrode G, a source electrode S, a drain electrode D and a channel 151. The gate electrode G is connected to the scan line 16, the source electrode S is connected to the data line 11, and the drain electrode D is connected to the pixel electrode 13 by the via hole 152. The formation of this construction is described as follows. First, a first metal layer is formed on a substrate 19 and then patterned to form the gate electrode G and the scan lines 16. Next, an insulation layer 191 is formed to cover the gate electrode G. An amorphous-Si (a-Si) layer is formed above the insulation layer 191 and then patterned to form the channel 151. After that, a second metal layer is formed, and the drain electrode D and the source electrode S are made of the second metal layer by patterning. Then, a protection layer 192 is formed above the drain electrode D and source electrode S so as to cover the insulation layer 191. The via hole 152 is then formed within the protection layer 192 so as to expose the drain electrode D. Finally, the pixel electrode 13 is formed above the protection layer 192.
The scan lines 16 are formed at the same time when the gate electrode G is formed, and the data lines 11 are formed at the same time when the source electrode S and the drain electrode D are formed. The scan lines 16 are insulated from the data lines 11 by the insulation layer 191.
Typically, there are two types of storage capacitors, one being constructed on the gate electrode (Cst on gate), as the storage capacitor 18 shown in FIG. 2, the other one being constructed on the common line (Cst on common). The storage capacitors usually utilize the gate electrode G or the common line (the first metal layer) as one electrode, and the second metal layer and the pixel electrode 13 as counter electrode, wherein the second metal layer is electrically connected to the pixel electrode 13 by a via hole 183 of the protection layer 192 (FIG. 5). The overlapping portion of the two electrodes is the main location where the electric charge is stored.
FIGS. 4 and 5 show a storage capacitor constructed on the common line (Cst on common). The storage capacitor 18 comprises a common electrode 181 and a capacitor electrode 182, which are separated by the insulation layer 191. In such a structure, the material of the dummy data lines 14 is the same as that of the common electrode 181. Therefore, the dummy data lines 14 are circuit lines that connect to the common electrode 181, not floating circuit lines. The formation of storage capacitor 18 is described as follows. First, a first metal layer is formed on the substrate 19 and then patterned to form the common electrode 181 that is connected to the common line. Next, an insulation layer 191 is formed to cover the common electrode 181. After that, a second metal layer is formed above the insulation layer 191, and the capacitor electrode 182 is made of the second metal layer. Then, a protection layer 192 is formed to cover the capacitor electrode 182. The via hole 183 is then formed within the protection layer 192. Finally, the pixel electrode 13 is formed above the protection layer 192, wherein the pixel electrode 13 is electrically connected to the capacitor electrode 182 by the via hole 183. The overlapping portion between the common electrode 181 and the capacitor electrode 182 is the main location where the electric charge is stored.
Referring to FIG. 1, if the data line 11 is disconnected, the segment of the data line below open area A would not be able to receive data, and a defect will be formed. In order to solve the problem, a conventional approach is to add an extra circuit 17 onto the display panel 10 during the manufacturing process. The extra circuit 17 is not electrically connected to the data line 11 under normal condition. When the data line 11 is disconnected, the extra circuit 17 is welded to the data line 11 by laser, as shown in the welding points B, C and D. Therefore, the segment of the data line below open area A can receive data through extra circuit 17.
The disadvantage of the above method is that it must have an additional circuit, which needs more space for routing. In operation, the data lines 11 are grouped, for example, four data lines in FIG. 1 are included in one group, and the data lines in the same group use one extra circuit line. Although the total amount of the extra circuit lines can be reduced, the repair cannot be made when the data lines in the same group are disconnected at the same time.
Consequently, there is an existing need for a novel and improved display panel to solve the above-mentioned problem.